It is often desirable to take data packets from one source and to send the data packets to one or more of a number of possible destinations. This is the case in the downstream direction from a stock exchange, for example, where it is desirable for a number of machines such as stock traders' computers to potentially receive packets from the exchange.
In some applications it is appropriate to broadcast or multicast from one port to many ports. Multicast broadcasts every packet at the input of the device (the switch) to every output of the switch and can for example be achieved by use of a crosspoint switch. However, in other scenarios such as in the case of a packet switch, unicast communications between two endpoints should be private.
Addressable switching can be implemented in an integrated circuit by processing downstream packets using some mechanism (e.g. such as a content addressable memory in a traditional packet switch). Conventionally this involves receiving data on a single transceiver, checking the packet address, referring to a lookup table to identify a port associated with the address, and then directing the packet to only that port. This approach is based on the principle of optimising bandwidth usage, but requires relatively complex circuitry within the switch.
Current network switches require that the layer 1 (physical layer) data be converted to layer 2 (the data link layer) for address checking, before being returned to layer 1. Converting data from layer 1 to layer 2 requires data deserialization into a parallel stream because it is difficult to implement layer 2 features in a serial stream at the frequencies involved. This means that any layer 2 processing is much slower than layer 1, and layer 2 address checking introduces a significant delay of approximately 200-400 ns for even the fastest layer 2 network switches. When used for upstream aggregation of multiple traders' data traffic into a single stream, this requires use of a many-to-one switch such as an Ethernet switch in addition to a MetaConnect C16 switch from Metamako LP, undesirably increasing latency. Moreover, network switches must often deal with both upstream and downstream data paths in a single device, complicating the signal paths and introducing clocking limitations. Many existing switches are designed in order to optimise bandwidth and flexibility of use amongst many use cases.
Any discussion of documents, acts, materials, devices, articles or the like which has been included in the present specification is solely for the purpose of providing a context for the present invention. It is not to be taken as an admission that any or all of these matters form part of the prior art base or were common general knowledge in the field relevant to the present invention as it existed before the priority date of each claim of this application.
Throughout this specification the word “comprise”, or variations such as “comprises” or “comprising”, will be understood to imply the inclusion of a stated element, integer or step, or group of elements, integers or steps, but not the exclusion of any other element, integer or step, or group of elements, integers or steps.
In this specification, a statement that an element may be “at least one of” a list of options is to be understood that the element may be any one of the listed options, or may be any combination of two or more of the listed options.